Generally, a server imposes an extremely high requirement on system stability. A system status can be periodically saved when a system runs normally, and some key data also needs to be saved when the system is abnormal, so as to provide data support for locating a system error cause. When the system runs normally, there may be multiple methods and means to save system data. However, when the system is abnormal—crash for a most severe case, all routine methods and means are infeasible, and all interrupts cannot be responded to. In this case, a non-maskable interrupt (NMI) mechanism is required to save data.
The NMI is an interrupt that cannot be masked by a central processing unit (CPU). Regardless of a status of an interrupt flag (IF) bit, the CPU needs to make a response after receiving a valid NMI. The NMI is generally used to process faults, such as a coprocessor operation error, a memory verification error, and an input/output (I/O) port verification error, and is used to save an error status, exception information, and the like of an operating system (OS). Therefore, the NMI is an extremely important fault locating means in the current server field, and also is an extremely important feature in terms of a product itself.
Currently, architectures such as X86 and Million Instructions Per Second (MIPS) have corresponding NMI implementation mechanisms. Mainly, an interrupt is triggered periodically or triggered by a hardware fault, and the interrupt cannot be masked. The interrupt can be responded to even if a deadlock occurs in the system. The architectures such as X86 and MIPS make, by means of hardware, the system save data related to the NMI and execute user-defined processing such as writing a system log and resetting a watchdog timer in a non-secure mode. However, in an advanced reduced instruction set computing machine (ARM) architecture, no corresponding hardware can implement the NMI in the non-secure mode. Moreover, the existing arm-v8 specification and software solution do not support the NMI mechanism. Therefore, a method needs to be provided to implement the NMI mechanism without hardware support.